Commonly used EDA Tool for full customer IC design:

Synopsys   Design logic synthesis Physical Compiler physical synthesis Jupiter floorplanner Astro automatic place and route AstroRail and Astro XTalk analysis STAR-RCXT RC parasitic extraction Formality formal verification PrimeTime and PrimeTime-SI timing analysis Hercules LVS/DRC physical verification

Cadence   First Encounter virtuall prototyping SoC Encounter place and route  Fire & Ice QX RC parasitic extraction VoltageStorm power analysis Conformal-LC formal verification CeltIC crosstalk analysis Assura LVS/DRC physical verification

Mentor

 

Calibre LVS/DRC physical verification